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PD - 97284
AUTOMOTIVE MOSFET
Features
l l l l l l
IRLR3114ZPbF IRLU3114ZPBF
HEXFET(R) Power MOSFET
D
Advanced Process Technology Ultra Low On-Resistance 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax Logic Level
VDSS = 40V
G S
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
RDS(on) = 4.9m
D-Pak I-Pak IRLR3114ZPbF IRLU3114ZPBF
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C ID @ TC = 25C IDM PD @TC = 25C VGS EAS (Thermally limited) EAS (Tested ) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (Package Limited) Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energyd Single Pulse Avalanche Energy Tested Value Avalanche CurrentA Repetitive Avalanche Energy Operating Junction and Storage Temperature Range Reflow Soldering Temperature, for 10 seconds Mounting Torque, 6-32 or M3 screw
Max.
130 89 42 500 140 0.95 16 130 260 See Fig.12a, 12b, 15, 16 -55 to + 175
Units
A
W W/C V mJ A mJ C
h
g
Thermal Resistance
RJC RJA RJA
300 10 lbfyin (1.1Nym)
Junction-to-Case Junction-to-Ambient (PCB mount) Junction-to-Ambient
j
Parameter
Typ.
Max.
1.05 40 110
Units
C/W
j
ij
--- --- ---
HEXFET(R) is a registered trademark of International Rectifier.
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1
5/9/07
IRLR/U3114ZPbF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS V(BR)DSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
40 --- --- --- 1.0 98 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.032 3.9 5.2 --- --- --- --- --- --- 40 12 18 25 140 33 50 4.5 7.5 3810 650 350 2390 580 820 --- --- 4.9 6.5 2.5 --- 20 250 100 -100 56 --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Conditions
V VGS = 0V, ID = 250A V/C Reference to 25C, ID = 1mA m VGS = 10V, ID = 42A VGS = 4.5V, ID = 42A V VDS = VGS, ID = 100A S VDS = 10V, ID = 42A A VDS = 40V, VGS = 0V VDS = 40V, VGS = 0V, TJ = 125C nA VGS = 16V VGS = -16V ID = 42A nC VDS = 20V VGS = 4.5V VDD = 20V ID = 42A ns RG = 3.7 VGS = 4.5V D Between lead,
e e
e e
nH
6mm (0.25in.) from package
G
pF
S and center of die contact VGS = 0V VDS = 25V = 1.0MHz VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 32V, = 1.0MHz VGS = 0V, VDS = 0V to 32V
f
Source-Drain Ratings and Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 30 27 130 A 500 1.3 45 41 V ns nC
Conditions
MOSFET symbol showing the integral reverse
G D
S p-n junction diode. TJ = 25C, IS = 42A, VGS = 0V TJ = 25C, IF = 42A, VDD = 20V di/dt = 100A/s
e
e
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRLR/U3114ZPbF
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
1000
TOP VGS 15V 10V 8.0V 4.5V 3.5V 3.0V 2.7V 2.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
2.5V
1 2.5V 0.1 0.1 1
60s PULSE WIDTH
Tj = 25C 1 100 0.1 1 10
60s PULSE WIDTH
Tj = 175C 10
100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
200
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current (A)
T J = 25C 150
100 T J = 175C 10 T J = 25C
100 T J = 175C 50 V DS = 10V 380s PULSE WIDTH 0 0 20 40 60 80 100
1 VDS = 15V 60s PULSE WIDTH 0.1 1 2 3 4 5 6 7
VGS, Gate-to-Source Voltage (V)
ID,Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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IRLR/U3114ZPbF
100000
VGS = 0V, f = 1 MHZ Ciss = C gs + Cgd, C ds SHORTED Crss = C gd Coss = Cds + Cgd
6.0 ID= 42A
VGS, Gate-to-Source Voltage (V)
5.0 4.0 3.0 2.0 1.0 0.0
C, Capacitance (pF)
10000 Ciss Coss Crss
VDS= 32V VDS= 20V VDS= 8.0V
1000
100 1 10 VDS, Drain-to-Source Voltage (V) 100
0
10
20
30
40
50
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on) 1000 100sec 100 1msec 10msec Tc = 25C Tj = 175C Single Pulse 1
0.0 0.5 1.0 1.5 2.0 2.5 3.0
100
T J = 175C
10
T J = 25C
ID, Drain-to-Source Current (A)
VGS = 0V
ISD, Reverse Drain Current (A)
10
DC 10 100
1.0 VSD, Source-to-Drain Voltage (V)
1
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRLR/U3114ZPbF
140 120
ID, Drain Current (A)
2.0
Limited By Package
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 42A VGS = 10V
100 80 60 40 20 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100120140160180 T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
10
Thermal Response ( Z thJC ) C/W
1 D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE ( THERMAL RESPONSE ) 1E-005 0.0001 0.001
R1 R1 J 1 2 R2 R2 R3 R3 3 R4 R4 C 2 3 4 4
0.1
Ri (C/W)
0.0350 0.2433 0.4851 0.2867
i (sec)
0.000013 0.000077 0.001043 0.004658
J
1
0.01
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc 0.01 0.1
0.001 1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRLR/U3114ZPbF
EAS , Single Pulse Avalanche Energy (mJ)
15V
600 500 400 300 200 100 0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C) ID 9.7A 17A BOTTOM 42A TOP
VDS
L
DRIVER
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS
QGD
VGS(th) , Gate threshold Voltage (V)
3.0
VG
2.5
Charge
2.0 ID ID ID ID = 150A = 250A = 1.0mA = 1.0A
Fig 13a. Basic Gate Charge Waveform
1.5
L
0
1.0
DUT 1K
VCC
0.5 -75 -50 -25 0 25 50 75 100 125 150 175 200 T J , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRLR/U3114ZPbF
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100 0.01
Allowed avalanche Current vs avalanche pulsewidth, tav, assuming Tj = 150C and Tstart =25C (Single Pulse) 0.05 0.10
10
1 Allowed avalanche Current vs avalanche pulsewidth, tav, assuming j = 25C and Tstart = 150C. 0.1 1.0E-06 1.0E-05 1.0E-04 tav (sec) 1.0E-03 1.0E-02 1.0E-01
Fig 15. Typical Avalanche Current vs.Pulsewidth
150
EAR , Avalanche Energy (mJ)
TOP Single Pulse BOTTOM 1.0% Duty Cycle ID = 42A
100
50
0 25 50 75 100 125 150 175 Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long as neither Tjmax nor Iav (max) is exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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IRLR/U3114ZPbF
Driver Gate Drive
D.U.T
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
RD
VDS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
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IRLR/U3114ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
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10
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IRLR/U3114ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR TRR TRL
16.3 ( .641 ) 15.7 ( .619 )
16.3 ( .641 ) 15.7 ( .619 )
12.1 ( .476 ) 11.9 ( .469 )
FEED DIRECTION
8.1 ( .318 ) 7.9 ( .312 )
FEED DIRECTION
NOTES : 1. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm NOTES : 1. OUTLINE CONFORMS TO EIA-481.
Repetitive rating; pulse width limited by
Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS . max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L = 0.15mH Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive RG = 25, IAS = 42A, VGS =10V. Part not avalanche performance. recommended for use above this value. This value determined from sample failure population. 100% Pulse width 1.0ms; duty cycle 2%. tested to this value in production. When mounted on 1" square PCB (FR-4 or G-10 Material). R is measured at TJ approximately 90C. Data and specifications subject to change without notice. This product has been designed for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
Notes:
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.05/07
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